Project Types
HOSPITALS
BIOTECHNOLOGY, PHARMACEUTICALS, & HOSPITALS
Lead Mechanical Engineer – Genentech, Inc., South San Francisco, California: Design for HVAC upgrade of 18,000 square-foot cell culture building.
Project Manager Lead Mechanical Engineer – Syntex Corporation, Palo Alto, California: retrofit design for 10,000 square-foot research and development facility.
Lead Electrical Engineer – Alza Corporation, Mountain View, California: As-built and tenant improvement designs for buildings M3, M4, MP1, MP5 and RC11.
Lead Electrical Engineer – Sugen Inc., San Francisco, California: Tennant Improvement design and electrical distribution load study, which consists of harmonic and circuit breaker coordination study for the entire site.
Lead Electrical Engineer – Chandler Medical Center Hospital, Chandler, Arizona: Complete electrical design of the hospital facility with N+1 redundancy for the primary power distribution system.
Lead Electrical Engineer – Scottsdale North Hospital, Scottsdale, Arizona: Complete electrical design modification package for special systems, chiller and HVAC installation, landscape and exterior lighting.
DATA CENTERS
DATA CENTERS
Project Manager – US DataPort, San Jose, California: Entitlement, Permitting, schematic design, design development, establishing project budget and financial projections for 2.5 million square feet of data center campus on 174-acre site. Project included 250 MW cogeneration power plant and 60,000 tons capacity chiller plant.
Project Manager – US DataPort, Prince William County, Virginia: Entitlement, Permitting, schematic design, design development, establishing project budget and financial projections for 3.4 million square feet of data center campus on 186-acre site. Project included 250 MW cogeneration power plant and 80,000 tons capacity chiller plant.
Project Manager – US DataPort, Bayonne and Irvington (2 sites), New Jersey: Site evaluations, infrastructure investigations, County and City negotiations for the development of 2.5 million square foot data center campus on approximately 120-acre sites with 250 MW cogeneration power plants, and 80,000 tons capacity chiller plants.
Project Manager – US DataPort, Guam: Site search, site evaluations, infrastructure investigations and local government contacts for the development of 100,000 square foot data center facility.
Development Manager Digiplex, Europe: Turnkey design and construction of over 1.0 million square feet of data centers throughout Europe.
Development Manager – I-Asiaworks, Asia: Turnkey design and construction of over 0.5 million square feet of data centers throughout Asia.
Project Manager – Intel Corp., Kiryat Gat, Israel: Design and construction of a 20,000 square-foot corporate data center.
Project Manger and Lead Mechanical Engineer – Intel Corp., Santa Clara, California: retrofit of existing 15,000 square-foot building into computer data center.
Lead Mechanical Engineer – Silicon Systems, Santa Cruz, California: Retrofit of existing 5000 square-foot area into a corporate data center.
Lead Mechanical Engineer – Amdahl M-4, Santa Clara, California: Design of mechanical systems for 10,000 square-foot data center facility.
Lead Mechanical Engineer – Sentinel Data Center, Santa Cruz, California: Design of mechanical systems for a 3000 square-foot data center to support a newspaper publishing plant.
Lead Mechanical Engineer – Visa International, Redwood City, California: Design of mechanical systems for a 30,000 square-foot data center.
Lead Mechanical Engineer – IDT Building 3, Santa Clara, California: Design of mechanical systems for a 1000 square-foot data center to support a wafer fab.
Lead Mechanical Engineer – Amdahl Building 03, Santa Clara, California: Design of mechanical systems for 11,000 square-foot of data center facility.
Lead Electrical Engineer Microsoft, Mountain View, California: Design of 1,355,000 square-foot campus with 5,500 square-foot data center and N+1 redundancy. The project included electrical systems analyses, value engineering assessments electrical energy compliance evaluations and design and implementation of a high voltage substation.
MICRO ELECTRONICS
MICRO ELECRTRONICS
Project Manager and Lead Mechanical Engineer -ST Microelectronics, Phoenix, Arizona: Design of a 2400-ton variable flow chiller plant to replace an existing chiller plant at Building 1100. New chiller plant incorporates energy efficiency features such as variable speed drives, single loop chilled water pumping, and waterside economizers.
Project Manager and Lead Mechanical Engineer – ST Microelectronics, Phoenix, Arizona: Design of a 7000 square-foot, Class 1 cleanroom expansion for the EPI process. Expansion included adding flammable and corrosive gas storage areas.
Project Manager and Lead Mechanical Engineer – Seagate, Milpitas, California: Design for retrofit of 5000 square-foot building for the installation of a plating line. The retrofit included adding a Class 1000 cleanroom around the plating line.
Project Manager, Lead Mechanical Engineer, and Lead Architect – National Semiconductor, Santa Clara, California: Design for the retrofit of 14,000 square-foot conversion of an existing fab to a copper process fab. Project included upgrading the existing fab to Class 1 cleanrooms.
Project Manager, Lead Mechanical Engineer, and Lead Architect – National Semiconductor, Santa Clara, California: Retrofit design for replacing two 45,000 CFM air-handling units for fab in Building E.
Project Manager, Lead Mechanical Engineer, and Lead Architect – IBM, Guadalajara, Mexico: Design of a new 17,000-square-foot chemical storage and distribution facility. Facility included flammable and general storage of virgin and used chemicals for IBMs disk drive assembly factory in Mexico.
Project manager – Intel Corp., Kiryat-Gat, Israel: Complete design and construction of 1,260,000 square-foot greenfield semiconductor manufacturing facility, including an 85,000 square-foot Class 1 cleanroom, a 75,000 square-foot central utility building, 400,000 square-foot, four-story office building, 80,000 square-foot office/warehouse, and 30,000 square-foot hazardous material storage building (Fab 18).
Lead Electrical Engineer and Lead Architect- Episil, Tai Nan, Taiwan: Electrical engineering design of one 161 KV GIS, transmission substation with multiple 22.8 KV supporting substations for a large Episil cleanroom facility. Design includedN+1 redundancy and emergency power requirement.
Lead Electrical Engineer Novellus, San Jose, California: Design of a 100,000 square-foot cleanroom facility for training purposes. Design of 90,000 square-foot Class 1 cleanroom facility, including tool fit‑up and tool hook‑up. Complete design of power distribution system, calculations of power distribution cable, lighting and grounding systems and California Title 24 Energy Code study.
Lead Electrical Engineer Intel, Chandler, Arizona: Design and construction services for upgrades of power distribution system and a substation with tiebreaker. Electrical design and calculations of power cable, lighting and grounding, life safety and special systems for buildings C3, C4, C10, C1 1, and Fab 6. Provided short circuit analysis and breaker coordination study for site engineering department. Responsibility for Migrating controls devises for 21 HVAC, VFD/AFD and exhaust fan units from Johnson Control to NCU/NEU FMS system, including preparation of PandIDs, point-to-point control diagrams, and riser diagrams.
Lead Electrical Engineer Intel, Santa Clara, California: Lead a team of 10 employees to provide tool hook-up and fit-up service for 300 tools for D2 fab, phases 1,2,3 and 4.
Lead Electrical Engineer and Lead Architect- Intel, Santa Clara, California: Feasibility study for a proposed new Building 5 to provide additional power and secondary substations.
Lead Electrical Engineer Motorola, Scottsdale, Arizona: Design for the addition of a new substation, cleanroom and motor control center, including lighting, power, special systems design and construction administration for facility system upgrades.
Lead Mechanical Engineer – Intel Corp., Chandler, Arizona: Master planning, design, and construction services for a 1,300,000‑square-foot sub-micron microelectronics manufacturing facility with Class 1 cleanrooms (Fab 12). Responsibilities included feasibility analysis for a 75 MW cogeneration plant.
Project Manager – Applied Materials, Santa Clara, California: Maydan technology center design and construction administration services.
Life Safety Engineer – Applied Materials, Santa Clara, California: Turnkey design and construction of the life safety system for the Santa Clara campus site.
Project Manager, Lead Architect and Lead Mechanical Engineer – Applied Materials, Japan: Feasibility analysis for upgrade of 20,000 square-foot applications laboratory.
Project Manager, Lead Architect and Lead Mechanical Engineer -Applied Materials, Korea: Multidisciplinary schematic design services for a new applications laboratory.
Project Manager and Lead Life Safety Engineer – Applied Materials, Taiwan: Design and construction administration services for the life safety systems for a new applications laboratory.
Project Manager, Lead Mechanical Engineer, and Lead Architect – VLSI Technology, Inc., San Jose, California: Complete design and construction administration services for a new 3,600 square-foot Class 1,000 product development laboratory.
Project Manager, and Lead Mechanical Engineer- Nikon Precision, Belmont, California: Complete design and construction administration for a new 5,000 square-foot Class 10,000 product development and testing cleanroom.
Lead Mechanical Engineer – SEEQ Technology, Milpitas, California: Complete design for retrofit of an existing cleanroom and hookup design for installation of Nikon steppers.
Project Manager and Lead Mechanical Engineer – Bell Communications Research, Red Bank, New Jersey: Complete design for a humidity control system upgrade of 200,000 square-foot research and development facility.
Lead Mechanical Engineer – Intel Corp., Rio Rancho, New Mexico: 233,000‑square-foot expansion of sub micron microelectronics manufacturing facility with 43,000 square feet of Class 1 cleanroom and expansion of existing support facilities (Fab 11P1).
Lead Mechanical Engineer – Intel Corp., Jerusalem, Israel: Site analysis for a new 120,000‑square-foot semiconductor fab (Fab 8).
Lead Mechanical Engineer – Intel Corp., Rio Rancho, New Mexico: Programming for a 1,300,000‑square-foot sub micron microelectronics manufacturing facility with 105,000 square-feet of Class 1 cleanroom (Fab 11P2).
Lead Mechanical Engineer – Intel Corp., Chandler, Arizona: Master planning, design, and construction services for a 1,300,000‑square-foot sub micron microelectronics manufacturing facility with Class 1 cleanrooms (Fab 12).
Project Manager – Lam Research, Inc., Fremont, CA: Multidiscipline design for Class 10 Cleanrooms and Fab.
Project Manager, Lead Mechanical Engineer, and Lead Architect – Intel Corp., Santa Clara, California: Retrofit design of 7,000 square-foot, Class 100 tab process room in D2 building.
Project Manager, Lead Mechanical Engineer, and Lead Architect – Intel Corp., Santa Clara, California: Retrofit design of 15,000 square-foot Class 1 area and multiple Class 100 and Class 1,000 areas (Building D2).
Project Manager, Lead Mechanical Engineer, and Lead Architect – Intel Corp., Santa Clara, California: Retrofit of existing 60,000 square-foot building to test area (SC‑7).
Project Manager, Lead Mechanical Engineer, and Lead Architect – Intel Corp., Santa Clara, California: Retrofit of existing 20,000 square-foot building into research and development and test labs (SC‑9).
Project Manager, Lead Mechanical Engineer, and Lead Architect – VLSI Technology, Inc., San Jose, California: Design for the addition of a thermal oxidizer unit for solvent exhaust abatement from existing semiconductor fab.
Project Manager, Lead Mechanical Engineer, and Lead Architect – Xerox Corporation, El Segundo, California: Silicon sub micron prototyping facility, including 16,500 square-feet of cleanroom space.
Project Manager, Lead Mechanical Engineer, and Lead Architect – Intel Corp., Santa Clara, California: Retrofit design of 3,000 square-foot Class 1 cleanroom in Fab 1.
Project Manager, Lead Mechanical Engineer, and Lead Architect – Intel Corp., Santa Clara, California: Design for hookup of various process tools.
Lead Mechanical Engineer – National Semiconductor, Puyallup, Washington: Programming for remodel of 14,000 square-foot wafer fab.
OUR CLIENTS
“Bay Engineers provide us with exactly what is needed in a hospital construction environment. They are extremely knowledgeable, respond very quickly, and are very proactive and helpful during the early design phases. In addition, they are always right there for us when a construction issue arises. They have my highest recommendation.”
Contact Bay Engineers now for a free consultation of your facility.
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